Software/hardware partition is one of the key steps in SoC software/hardware co-design. In response to the software/hardware partition problem, an undirected graph-based software/hardware partition method is proposed. The software cost and hardware cost are set as the nodes of the network graph, and the communication costs between functional modules are set as undirected edges, so that the software/hardware partition of the chip is resolved into multi-objective optimization problem based on undirected graph theory. The simulation results prove that this method is more efficient than GA algorithm and KL algorithm. FPGA test platform is designed and developed to realize parallel development of software/hardware and improve the efficiency of baseband chip development. This method is implemented in the BDS/GPS dual-mode baseband chip, which provides a theoretical basis for the software/hardware partition of the baseband chip design.
